Status Register¶
The Status Register is an 8-Bit register that holds information about the result of the most recently executed arithmetic instructions. This information could be used for conditional branching or manipulating the program flow.
| ⚠️ DON'T FORGET |
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| After all ALU instructions, the status register will be cleared. |
Bit 0 - C: Carry Flag¶
Indicates a carry in an arithmetic or logic operation
Bit 1 - Z: Zero Flag¶
Indicates a zero result in an arithmetic or logic operation
Bit 2 - N: Negative Flag¶
Indicates a negative result in an arithmetic or logic operation
Bit 3 - V: Two's Complement Overflow Flag¶
Supports two’s complement arithmetic.
Bit 4 - S: Sign Flag¶
S = N ㊉ V
Exclusive Or between the Negative Flag (N) and the Two’s Complement Overflow Flag (V)
Bit 5 - H: Half Carry Flag¶
Indicates a half carry in some arithmetic operations. Very usefull for BCD -Binary Coded Decimal-.
Bit 6 - T: Bit Copy Storage¶
The Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source or destination for the operated bit. A bit from a register in the Register File can be copied into T by the BST instruction, and a bit in T can be copied into a bit in a register in the Register File by the BLD instruction.
Bit 7 - I: Global Interrupt Enable¶
The Global Interrupt Enable bit must be set for the interrupts to be enabled. The individual interrupt enable control is then performed in separate control registers. If the Global Interrupt Enable Register is cleared, none of the interrupts are enabled independent of the individual interrupt enable settings. The Ibit is cleared by hardware after an interrupt has occurred, and is set by the RETI instruction to enable subsequent interrupts. The I-bit can also be set and cleared by the application with the SEI and CLI instructions.
Example Code
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